We have an opening for a Content Writer who can develop contents of articles, press releases, and blogs to increase branding, SEO, and public relations for its affiliated companies, trademarks and websites. Experience in SEO best practices.
NEGOTIABLEDeloitte\" is the brand under which 165,000 dedicated professionals in independent firms throughout the world collaborate to provide audit, consulting, financial advisory, risk management, and tax services to selected clients. These firms are members ...
NEGOTIABLEThe candidate should be a Graduate /MBA with 5-7 years experience in media planning and media mix with proven track record in providing creative and innovative media planning solutions in large and reputed firms, preferably in Realty Industry.
NEGOTIABLE- We are looking for Marketing Executives to work with our company. Main job profile is to develop & execute the marketing strategy for increasing the unique visitors for the sites and portals
NEGOTIABLEAnalyzing the market, including competitors and consumers # Executing marketing strategies and campaigns # Attending and organizing promotional events and exhibitions # Coordinating with and reporting to managers to carry out campaigns
NEGOTIABLEThe candidate should be a Graduate /MBA with 5-7 years experience in Sales Administration in large real estate companies. Conversant in collections from Customers followup, Communicating with the Customers through email to follow up instalment amounts ...
NEGOTIABLEShould have experience in the field of composite (Polymer) insulators/ ceramic Insulators
NEGOTIABLEGlobalHunt is a leading executive search and Selection Company specializes in Technology & Telecom, Business Process Outsourcing, Financial Services, Life Sciences, Consumer and Engineering vertical recruitments in geographical span of Asia- Pacific, ...
NEGOTIABLEThe candidate should be a Graduate with good communication skills & convincing skills. Should be able to handle queries & other in a most pleasing manner. Should maintain good rapport with the Client/Customer.
NEGOTIABLEShould have good knowledge and work experience in Photoshop and as DTP Operator
NEGOTIABLE4+yrs of exp and of which minimum 2.5+ years of experience in Magma place and route tool (talus is a plus). a) Able to write Magma Tcl scripts. b) Very good experience in Clock tree Synthesis involving multiple clocks. Should be able to analyze the
Negotiable8+ years hands-on experience with deep understanding of chip level physical design – CTS, routing, ECO flows. Synopsys ICC experience is highly desired.Proven experience with high-speed interface/DDR integration Hands-on experience with DSM SoC
Negotiable- Completion of the physical design, PnR, Timing, Power & Noise Analysis. * Experience in floor-planning & implementing complex cell, block & chip-level layouts. - Exp in PnR Tools (Encounter, Virtuoso). - Scripting Knowledge.
Negotiable3-5 years of extensive experience in large VLSI physical design implementation on 0.18u or below technology. Must have hands on experience of chip tapeouts including Physical Verification, Decks (DRC/LVS/ERC/Antenna) & Tape out.
NegotiableTechnical skills : Good familiarity with Processor & System Architecture Good familiarity with OS Concepts, Device Drivers C, C++, Perl & Assembly Programming. Opportunity to develop in-depth Knowledge of X86 Architecture & Micro Architecture.
NegotiableTechnical skills : Strong understanding of C/ C++, Datastructure. -Strong in Software Architecture, OOAD Concepts, Design-patterns -Understanding to EDA Tool Development & EDA Domain(Verilog/ VHDL, Scripting).
Negotiable* Exp. of 6+ years in Functional Verification of complex ASIC designs. * Exp in Development of chip level & /or block level test-bench env using SystemVerilog/Verilog/C/C++/ASM * Functional coverage, DFT verification.
NegotiableDescription - Responsible for the completion of Physical Design, PnR, Timing, Power & Noise Analysis. - A proven track record of 2 tape outs & State of the art hands-on Experience is essential. - Exp with PnR tool, CTS, Physical Verification.
NegotiableAMS Verification BE/B.Tech in EE with 3-12 years Requires modeling Exp in verilog. Worked in a mixed signal verification environment. Extensive modeling of custom memory arrays & mixed signal circuits (PHYs) Analog circuit design is +
Negotiablecoding, design and development on embedded technologies, "C" and assembly language, Device Driver, Protocol Stack Development, exposure to testing and validation preferred
NegotiableSearch local jobs in Jamia Osmania from top local employers and recruitment agencies. Above are the latest permanent, part-time and contract work in Jamia Osmania brought to you by My Hyderabad Jobs
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